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Head Office: 01353 880253
Cambridge Office: 01223 628740
St Neots Office: 01480 573387

Technical & Engineering

IC Design Test Engineer

Location: Cambridge
Sector: Technical & Engineering, Temporary & Interim
Job type: Full Time, Temporary
Hours: Full Time, 30% of time on site
Reward: Highly Competitive to attract best candidates
Start: ASAP
Benefits: Travel opportunities, Free breakfast cereals, fresh fruit, tea & freshly ground coffee, daily, Lunchtime leisure activities (tennis/table tennis/gaming), Cycle to work scheme, Regular social and team events, Shower facilities, Private Health Insurance, Life insurance, 25 holidays plus public holidays (total of 33 days a year), Training by world leading experts
Reference number: KB/Req/004447


If you get excited by working in a collaborative environment where your ideas will be given chance to grow and expand then this could be the company for you! You will be passionate about working with cutting edge technology and will have in-depth knowledge of both analog and digital IC design principles. Knowledge of EDA tools such as Tessent, Cadence Module or Testmax are essential. You will be an analytical thinker alongside being an APGT/MBIST expert. Working as part of a multi-disciplinary team you will be rewarded with the opportunity to make an important contribution to a dynamic global company.



  • Responsible for Scan insertion and validation, BIST, MBIST insertion and validation, ATPG, IP
  • tests and Pattern Validation w/wo Timing
  • DFT mode timing Analysis and sign off
  • Responsible for a comprehensive DFT plan and drive the implementation
  • Train and mentor other test engineers
  • Generating, verifying and debugging HDL and firmware-based test cases
  • Improving, extending, and porting existing DFT circuits and concepts to FPGA
  • Developing test-benches and documenting test plans
  • Create and maintain comprehensive DFT documentation, requirements specifications, and
  • test plans

Experience Required:

  • Possess in-depth knowledge of analog and digital IC design principles
  • Experience of scan-stitching
  • Experience of MBIST/BISR implementation
  • Must know how to build a new flow from scratch
  • Must be familiar with Synopsys/Cadence/Mentor industry standard toolsets
  • Previous experience of EDA tool specification/procurement is nice to have
  • ATE bring up and production support skills are essential

If you have not received a response within 3-5 working days, unfortunately your application has been unsuccessful. Busy Bee Recruitment Ltd is acting as an Employment Business for this Temporary vacancy.

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Head Office: 01353 880253
Cambridge Office: 01223 628740
St Neots Office: 01480 573387

Head Office

7B Regal Lane
Soham, Ely

Cambridge Office

I8 Stirling House
Cambridge Innovation Park
Denny End Road, Waterbeach
CB25 9PQ

St Neots Office

The Limes
24 New Street
St. Neots
PE19 1AJ
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Head Office: 
01353 880253
Cambridge Office: 
01223 628740
St Neots: 
01480 573387